@inproceedings{seger2005an,
author = {Seger, Carl and Jones, Robert and Aagaard, Mark and Melham, Tom and Barrett, Clark and Syme, Don},
title = {An Industrially Effective Environment for Hardware Verification},
year = {2005},
month = {August},
abstract = {The Forte formal verification environment for datapath-dominated hardware is described. Forte has proven to be effective in large-scale industrial trials and combines an efficient linear-time logic model-checking algorithm, namely the symbolic trajectory evaluation (STE), with lightweight theorem proving in higher-order logic. These are tightly integrated in a general-purpose functional programming language, which both allows the system to be easily customized and at the same time serves as a specification language. The design philosophy behind Forte is presented and the elements of the verification methodology that make it effective in practice are also described.},
publisher = {Institute of Electrical and Electronics Engineers, Inc.},
url = {http://approjects.co.za/?big=en-us/research/publication/an-industrially-effective-environment-for-hardware-verification/},
}