@inproceedings{gebhart2009an,
author = {Gebhart, Mark and Maher, Bertrand A. and Coons, Katherine E. and Diamond, Jeff and Gratz, Paul and Marino, Mario and Ranganathan,  Nitya and Robatmili, Behnam and Smith, Aaron and Burrill, James and Keckler, Stephen W. and Burger, Doug and McKinley, Kathryn S},
title = {An Evaluation of the TRIPS Computer System},
booktitle = {International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)},
year = {2009},
month = {March},
abstract = {The TRIPS system employs a new instruction set architecture (ISA) called Explicit Data Graph Execution (EDGE) that renegotiates the boundary between hardware and soft- ware to expose and exploit concurrency. EDGE ISAs use a block-atomic execution model in which blocks are composed of dataflow instructions. The goal of the TRIPS design is to mine concurrency for high performance while tolerating emerging technology scaling challenges, such as increasing wire delays and power consumption. This paper evaluates how well TRIPS meets this goal through a detailed ISA and performance analysis. We compare performance, using cycles counts, to commercial processors. On SPEC CPU2000, the Intel Core 2 outperforms compiled TRIPS code in most cases, although TRIPS matches a Pentium 4. On simple benchmarks, compiled TRIPS code outperforms the Core 2 by 10% and hand-optimized TRIPS code out-performs it by factor of 3. Compared to conventional ISAs, the block-atomic model provides a larger instruction window, increases concurrency at a cost of more instructions executed, and replaces register and memory accesses with more efficient direct instruction-to-instruction communication. Our analysis suggests ISA, microarchitecture, and compiler enhancements for addressing weaknesses in TRIPS and indicates that EDGE architectures have the potential to exploit greater concurrency in future technologies.},
publisher = {ACM},
url = {http://approjects.co.za/?big=en-us/research/publication/evaluation-trips-computer-system/},
edition = {International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)},
}