{"id":155402,"date":"2008-11-01T00:00:00","date_gmt":"2008-11-01T00:00:00","guid":{"rendered":"https:\/\/www.microsoft.com\/en-us\/research\/msr-research-item\/verifying-compiler-transformations-for-concurrent-programs\/"},"modified":"2018-10-16T21:38:12","modified_gmt":"2018-10-17T04:38:12","slug":"verifying-compiler-transformations-for-concurrent-programs","status":"publish","type":"msr-research-item","link":"https:\/\/www.microsoft.com\/en-us\/research\/publication\/verifying-compiler-transformations-for-concurrent-programs\/","title":{"rendered":"Verifying Compiler Transformations for Concurrent Programs"},"content":{"rendered":"
\n

Compilers transform programs, either to optimize performance or to translate language-level constructs into hardware primitives. For concurrent programs, ensuring that a transformation preserves the semantics of the input program can be challenging. In particular, the emitted code must correctly emulate the semantics of the language-level memory model when running on hardware with a relaxed memory model. In this paper, we present a novel proof methodology for proving the soundness of compiler transformations for concurrent programs. Our methodology is based on a new formalization of memory models as dynamic rewrite rules on event streams. We implement our proof methodology in a first-of-its-kind semi-automated tool called Traver to verify or falsify compiler transformations. Using Traver, we prove or refute the soundness of several commonly used compiler transformations for various memory models. In this process, we find subtle bugs in the CLR JIT compiler and in the JSR-133 Java JIT compiler recommendations.<\/p>\n<\/div>\n

<\/p>\n","protected":false},"excerpt":{"rendered":"

Compilers transform programs, either to optimize performance or to translate language-level constructs into hardware primitives. For concurrent programs, ensuring that a transformation preserves the semantics of the input program can be challenging. In particular, the emitted code must correctly emulate the semantics of the language-level memory model when running on hardware with a relaxed memory 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