{"id":157752,"date":"2006-12-01T00:00:00","date_gmt":"2006-12-01T00:00:00","guid":{"rendered":"https:\/\/www.microsoft.com\/en-us\/research\/msr-research-item\/dataflow-predication\/"},"modified":"2018-10-16T20:01:37","modified_gmt":"2018-10-17T03:01:37","slug":"dataflow-predication","status":"publish","type":"msr-research-item","link":"https:\/\/www.microsoft.com\/en-us\/research\/publication\/dataflow-predication\/","title":{"rendered":"Dataflow Predication"},"content":{"rendered":"
Predication facilitates high-bandwidth fetch and large static scheduling regions, but has typically been too complex to implement comprehensively in out-of-order microarchitectures. This paper describes data\ufb02ow predication, which provides per-instruction predication in a data\ufb02ow ISA, low predication computation overheads similar to VLIW ISAs, and low complexity out-of-order issue. A two bit \ufb01eld in each instruction speci\ufb01es whether an instruction is predicated, in which case, an arriving predicate token determines whether an instruction should execute. Data\ufb02ow predication incorporates three features that reduce predication overheads. First, data\ufb02ow predicate computation permits computation of compound predicates with virtually no overhead instructions. Second, early mispredication termination squashes in-\ufb02ight instructions with false predicates at any time, eliminating the overhead of falsely predicated paths. Finally, implicit predication mitigates the fan out overhead of data\ufb02ow predicates by reducing the number of explicitly predicated instructions, by predicating only the heads of dependence chains. Data\ufb02ow predication also exposes new compiler optimizations\u2013such as disjoint instruction merging and path-sensitive predicate removal\u2013for increased performance of predicated code in an out-of-order design.<\/p>\n","protected":false},"excerpt":{"rendered":"
Predication facilitates high-bandwidth fetch and large static scheduling regions, but has typically been too complex to implement comprehensively in out-of-order microarchitectures. This paper describes data\ufb02ow predication, which provides per-instruction predication in a data\ufb02ow ISA, low predication computation overheads similar to VLIW ISAs, and low complexity out-of-order issue. A two bit \ufb01eld in each instruction speci\ufb01es […]<\/p>\n","protected":false},"featured_media":0,"template":"","meta":{"msr-url-field":"","msr-podcast-episode":"","msrModifiedDate":"","msrModifiedDateEnabled":false,"ep_exclude_from_search":false,"_classifai_error":"","footnotes":""},"msr-content-type":[3],"msr-research-highlight":[],"research-area":[13547],"msr-publication-type":[193716],"msr-product-type":[],"msr-focus-area":[],"msr-platform":[],"msr-download-source":[],"msr-locale":[268875],"msr-post-option":[],"msr-field-of-study":[],"msr-conference":[],"msr-journal":[],"msr-impact-theme":[],"msr-pillar":[],"class_list":["post-157752","msr-research-item","type-msr-research-item","status-publish","hentry","msr-research-area-systems-and-networking","msr-locale-en_us"],"msr_publishername":"IEEE\/ACM","msr_edition":"39th International Symposium on Microarchitecture (MICRO)","msr_affiliation":"","msr_published_date":"2006-12-01","msr_host":"","msr_duration":"","msr_version":"","msr_speaker":"","msr_other_contributors":"","msr_booktitle":"","msr_pages_string":"","msr_chapter":"","msr_isbn":"","msr_journal":"","msr_volume":"","msr_number":"","msr_editors":"","msr_series":"","msr_issue":"","msr_organization":"","msr_how_published":"","msr_notes":"","msr_highlight_text":"","msr_release_tracker_id":"","msr_original_fields_of_study":"","msr_download_urls":"","msr_external_url":"","msr_secondary_video_url":"","msr_longbiography":"","msr_microsoftintellectualproperty":1,"msr_main_download":"208887","msr_publicationurl":"","msr_doi":"","msr_publication_uploader":[{"type":"file","title":"predmicro06.pdf","viewUrl":"https:\/\/www.microsoft.com\/en-us\/research\/wp-content\/uploads\/2016\/02\/predmicro06.pdf","id":208887,"label_id":0}],"msr_related_uploader":"","msr_attachments":[{"id":208887,"url":"https:\/\/www.microsoft.com\/en-us\/research\/wp-content\/uploads\/2016\/02\/predmicro06.pdf"}],"msr-author-ordering":[{"type":"user_nicename","value":"aasmith","user_id":30783,"rest_url":"https:\/\/www.microsoft.com\/en-us\/research\/wp-json\/microsoft-research\/v1\/researchers?person=aasmith"},{"type":"text","value":"Ramadass Nagarajan","user_id":0,"rest_url":false},{"type":"text","value":"Karthikeyan Sankaralingam","user_id":0,"rest_url":false},{"type":"text","value":"Robert McDonald","user_id":0,"rest_url":false},{"type":"user_nicename","value":"dburger","user_id":31582,"rest_url":"https:\/\/www.microsoft.com\/en-us\/research\/wp-json\/microsoft-research\/v1\/researchers?person=dburger"},{"type":"text","value":"Stephen W. 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