{"id":158374,"date":"1997-12-01T00:00:00","date_gmt":"1997-12-01T00:00:00","guid":{"rendered":"https:\/\/www.microsoft.com\/en-us\/research\/msr-research-item\/high-speed-algorithms-architectures-for-number-theoretic-cryptosystems-2\/"},"modified":"2018-10-16T20:19:29","modified_gmt":"2018-10-17T03:19:29","slug":"high-speed-algorithms-architectures-for-number-theoretic-cryptosystems-2","status":"publish","type":"msr-research-item","link":"https:\/\/www.microsoft.com\/en-us\/research\/publication\/high-speed-algorithms-architectures-for-number-theoretic-cryptosystems-2\/","title":{"rendered":"High-Speed Algorithms & Architectures For Number-Theoretic Cryptosystems"},"content":{"rendered":"<div class=\"asset-content\">\n<p>Because of their flexibility and cost effectiveness, software implementations of number-theoretic cryptographic algorithms (e.g., RSA and Diffie-Hellman) are often desired. In order to obtain the required level of performance (speed) on a selected platform, the developers turn to algorithm-level optimizations and assembly language programming. In this paper, we examine these implementation issues and propose a design methodology for obtaining high-speed implementations. We show that between the full assembler implementation and the standard C implementation, there is a design option in which only a small number of code segments (kernel operations) are written in assembler in order to obtain a significant portion of the speed increase gained by the full assembler implementation. We propose a small set of kernel operations which are as simple as a\u00b7 b+c, where the numbers a, b, c are 1-word integers. The results of our experiments on several processors are also summarized.<\/p>\n<\/div>\n<p><!-- .asset-content --><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Because of their flexibility and cost effectiveness, software implementations of number-theoretic cryptographic algorithms (e.g., RSA and Diffie-Hellman) are often desired. In order to obtain the required level of performance (speed) on a selected platform, the developers turn to algorithm-level optimizations and assembly language programming. In this paper, we examine these implementation issues and propose a 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