Many important applications trigger bulk bitwise operations,
\ni.e., bitwise operations on large bit vectors. In fact, recent
\nworks design techniques that exploit fast bulk bitwise operations
\nto accelerate databases (bitmap indices, BitWeaving)
\nand web search (BitFunnel). Unfortunately, in existing architectures,
\nthe throughput of bulk bitwise operations is limited
\nby the memory bandwidth available to the processing unit
\n(e.g., CPU, GPU, FPGA, processing-in-memory).<\/p>\n
To overcome this bottleneck, we propose Ambit, an
\nAccelerator-in-Memory for bulk bitwise operations. Unlike
\nprior works, Ambit exploits the analog operation of DRAM
\ntechnology to perform bitwise operations completely inside
\nDRAM, thereby exploiting the full internal DRAM bandwidth.
\nAmbit consists of two components. First, simultaneous activation
\nof three DRAM rows that share the same set of sense
\namplifiers enables the system to perform bitwise AND and OR
\noperations. Second, with modest changes to the sense amplifier,
\nthe system can use the inverters present inside the sense
\namplifier to perform bitwise NOT operations. With these
\ntwo components, Ambit can perform any bulk bitwise operation
\nefficiently inside DRAM. Ambit largely exploits existing
\nDRAM structure, and hence incurs low cost on top of commodity
\nDRAM designs (1% of DRAM chip area). Importantly,
\nAmbit uses the modern DRAM interface without any changes,
\nand therefore it can be directly plugged onto the memory bus.
\nOur extensive circuit simulations show that Ambit works
\nas expected even in the presence of significant process variation.<\/p>\n
Averaged across seven bulk bitwise operations, Ambit
\nimproves performance by 32X and reduces energy consumption
\nby 35X compared to state-of-the-art systems. When
\nintegrated with Hybrid Memory Cube (HMC), a 3D-stacked
\nDRAM with a logic layer, Ambit improves performance of
\nbulk bitwise operations by 9.7X compared to processing in
\nthe logic layer of the HMC. Ambit improves the performance
\nof three real-world data-intensive applications, 1) database
\nbitmap indices, 2) BitWeaving, a technique to accelerate
\ndatabase scans, and 3) bit-vector-based implementation of
\nsets, by 3X-7X compared to a state-of-the-art baseline using
\nSIMD optimizations. We describe four other applications that
\ncan benefit from Ambit, including a recent technique proposed
\nto speed up web search. We believe that large performance
\nand energy improvements provided by Ambit can
\nenable other applications to use bulk bitwise operations.<\/p>\n","protected":false},"excerpt":{"rendered":"
Many important applications trigger bulk bitwise operations, i.e., bitwise operations on large bit vectors. In fact, recent works design techniques that exploit fast bulk bitwise operations to accelerate databases (bitmap indices, BitWeaving) and web search (BitFunnel). Unfortunately, in existing architectures, the throughput of bulk bitwise operations is limited by the memory bandwidth available to the […]<\/p>\n","protected":false},"featured_media":0,"template":"","meta":{"msr-url-field":"","msr-podcast-episode":"","msrModifiedDate":"","msrModifiedDateEnabled":false,"ep_exclude_from_search":false,"_classifai_error":"","footnotes":""},"msr-content-type":[3],"msr-research-highlight":[],"research-area":[13552],"msr-publication-type":[193716],"msr-product-type":[],"msr-focus-area":[],"msr-platform":[],"msr-download-source":[],"msr-locale":[268875],"msr-post-option":[],"msr-field-of-study":[],"msr-conference":[],"msr-journal":[],"msr-impact-theme":[],"msr-pillar":[],"class_list":["post-424701","msr-research-item","type-msr-research-item","status-publish","hentry","msr-research-area-hardware-devices","msr-locale-en_us"],"msr_publishername":"","msr_edition":"IEEE\/ACM Annual International Symposium on Microarchitecture (MICRO)","msr_affiliation":"","msr_published_date":"2017-10-18","msr_host":"","msr_duration":"","msr_version":"","msr_speaker":"","msr_other_contributors":"","msr_booktitle":"","msr_pages_string":"","msr_chapter":"","msr_isbn":"","msr_journal":"","msr_volume":"","msr_number":"","msr_editors":"","msr_series":"","msr_issue":"","msr_organization":"","msr_how_published":"","msr_notes":"","msr_highlight_text":"","msr_release_tracker_id":"","msr_original_fields_of_study":"","msr_download_urls":"","msr_external_url":"","msr_secondary_video_url":"","msr_longbiography":"","msr_microsoftintellectualproperty":1,"msr_main_download":"424704","msr_publicationurl":"","msr_doi":"http:\/\/dx.doi.org\/10.1145\/3123939.3124544","msr_publication_uploader":[{"type":"file","title":"MICRO-50_347","viewUrl":"https:\/\/www.microsoft.com\/en-us\/research\/wp-content\/uploads\/2017\/09\/MICRO-50_347.pdf","id":424704,"label_id":0},{"type":"doi","title":"http:\/\/dx.doi.org\/10.1145\/3123939.3124544","viewUrl":false,"id":false,"label_id":0}],"msr_related_uploader":"","msr_attachments":[],"msr-author-ordering":[{"type":"user_nicename","value":"visesha","user_id":36323,"rest_url":"https:\/\/www.microsoft.com\/en-us\/research\/wp-json\/microsoft-research\/v1\/researchers?person=visesha"},{"type":"text","value":"Donghyuk Lee","user_id":0,"rest_url":false},{"type":"text","value":"Thomas Mullins","user_id":0,"rest_url":false},{"type":"text","value":"Hasan Hassan","user_id":0,"rest_url":false},{"type":"text","value":"Amirali Boroumand","user_id":0,"rest_url":false},{"type":"text","value":"Jeremie Kim","user_id":0,"rest_url":false},{"type":"text","value":"Michael A. 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