Intel SGX offers hardware mechanisms to isolate code and\u00a0data running within enclaves from the rest of the platform.\u00a0This enables security verification on a relatively small software\u00a0TCB, but the task still involves complex low-level code.<\/p>\n
Relying on the Everest verification toolchain, we use F\u2217\u00a0for\u00a0developing specifications, code, and proofs; and then safely\u00a0compile F\u2217\u00a0code to standalone C code. However, this does\u00a0not account for all code running within the enclave, which\u00a0also includes trusted C and assembly code for bootstrapping\u00a0and for core libraries. Besides, we cannot expect all enclave\u00a0applications to be rewritten in F\u2217, so we also compile legacy\u00a0C++ defensively, using variants of \/guard that dynamically\u00a0enforce their safety at runtime.<\/p>\n
To reason about enclave security, we thus compose different\u00a0sorts of code and verification styles, from fine-grained\u00a0statically-verified F\u2217\u00a0to dynamically-monitored C++ and custom\u00a0SGX instructions. This involves two related program\u00a0semantics: most of the verification is conducted within F\u2217\u00a0using the target semantics of Kremlin\u2014a fragment of C with\u00a0a structured memory\u2014whereas SGX features and dynamic\u00a0checks embedded by defensive C++ compilers require lower-level\u00a0X64 code, for which we use the verified assembly language\u00a0for Everest (VALE) and its embedding in F\u2217.<\/p>\n","protected":false},"excerpt":{"rendered":"
Intel SGX offers hardware mechanisms to isolate code and\u00a0data running within enclaves from the rest of the platform.\u00a0This enables security verification on a relatively small software\u00a0TCB, but the task still involves complex low-level code. Relying on the Everest verification toolchain, we use F\u2217\u00a0for\u00a0developing specifications, code, and proofs; and then safely\u00a0compile F\u2217\u00a0code to standalone C code. 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