{"id":544137,"date":"2018-12-21T23:57:09","date_gmt":"2018-12-22T07:57:09","guid":{"rendered":"https:\/\/www.microsoft.com\/en-us\/research\/?post_type=msr-research-item&p=544137"},"modified":"2018-12-21T23:58:52","modified_gmt":"2018-12-22T07:58:52","slug":"direct-universal-access-making-data-center-resources-available-to-fpga","status":"publish","type":"msr-research-item","link":"https:\/\/www.microsoft.com\/en-us\/research\/publication\/direct-universal-access-making-data-center-resources-available-to-fpga\/","title":{"rendered":"Direct Universal Access: Making Data Center Resources Available to FPGA"},"content":{"rendered":"
FPGAs have been deployed at massive scale in data centers. Using currently available communication architectures, however, it is difficult for FPGAs to access and utilize the various heterogenous resources available in data centers (DRAM, CPU, GPU,…). In this paper, we present Direct Universal Access (DUA), a communication architecture that provides uniform access for FPGA to these data center resources.<\/p>\n
Without being limited by machine boundaries, DUA provides global names and a common interface for communicating across various resources, the underlying network automatically routing traffic and managing resource multiplexing. Our benchmarks show that DUA provides simple and fair-share resource access with small logic area overhead (<10%) and negligible latency (<0.2\u00b5s). We also build two practical multi-FPGA applications\u2014deep crossing and regular expression matching\u2014on top of DUA to demonstrate its usability and efficiency.<\/p>\n","protected":false},"excerpt":{"rendered":"
FPGAs have been deployed at massive scale in data centers. Using currently available communication architectures, however, it is difficult for FPGAs to access and utilize the various heterogenous resources available in data centers (DRAM, CPU, GPU,…). In this paper, we present Direct Universal Access (DUA), a communication architecture that provides uniform access for FPGA to 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