Field Programmable Gate Arrays (FPGAs) are used in wide range of applications from small devices to big data centers. Verilog HDL is one of the most common languages used by FPGA designers to implement a design. Then, different CAD tool steps provided by FPGA vendors implement the design for FPGAs. The innovation of within tools themselves for improving developer productivity and improving code quality has largely stagnated. There are some examples that show what is possible but they are few and accessibility is limited except for the most sophisticated development teams. gNOSIS aims to provides tools to assist developers be more productive debugging, verifying and improving the quality of their code. As more work is done on new custom tools, hardware developers could someday experience similar benefits that software developers have enjoyed for years: access to high quality open tool chains. As more developers have access to better tooling, this could spark a new wave of productivity and innovation.