GRIP – a high-performance architecture for parallel graph reduction
- SL Peyton Jones ,
- Chris Clack ,
- Jon Salkild ,
- Mark Hardie ,
- Simon Peyton Jones
Proc IFIP conference on Functional Programming Languages and Computer Architecture, Portland |
Published by Springer Verlag LNCS 274
GRIP is a high-performance parallel machine designed to execute functional programs using supercombinator graph reduction. It uses a high-bandwidth bus to provide access to a large, distributed shared memory, using intelligent memory units and packet-switching protocols to increase the number of processors which the bus can support. GRIP is also being programmed to support parallel Prolog and DACTL.
We outline GRIP’s architecture and firmware, discuss the major design issues, and describe the current state of the project and our plans for the future.